A class of direct current (DC) power supplies has considerable output ripple at double the line frequency. The ripple is usually attenuated by means of bulky passive L-C filters. A common power conversion topology associates a power factor correction (PFC) block and a pulse width modulation (PWM) block. The PFC block shapes the line current envelope to follow the line voltage, presenting an essential resistive load to the line. The PFC output current has, of necessity, a raised cosine envelope. The PFC output power pulsates at twice the line frequency and is smoothed by a storage capacitor at a relatively high voltage, typically 400 volts DC. The storage capacitor size is usually kept to a minimum at the expense of a relatively high ripple, e.g., 10 to 20 percent. The storage capacitor voltage is the source for the PWM converter block.
The PWM converter's switching frequency is much higher than the power line frequency; therefore the ripple is practically a static variation to the converter and can be easily removed by allotting a small fraction of the converter's PWM dynamic regulation range. The PWM converter loop gain tends to be high at the line ripple frequency, thus assuring a good ripple attenuation. The PWM converter output, after rectification, is still pulsating and requires filtering and energy storage, but at the higher frequencies utilized the energy storage demands are drastically reduced. The switching frequency filters are orders of magnitude smaller than equivalent line frequency filters.
The topology described above is referred to as a double conversion scheme. The first conversion (PFC) storage requirements are alleviated by the high voltage level and by the relaxed ripple requirements, since the ripple can be effectively eliminated by the second conversion. There are topologies which allow PFC, isolation, and voltage conversion at a high frequency with a single conversion block. The efficiency advantages are obvious, since losses are created at every conversion stage; however the PFC function, by nature, demands that the secondary power be delivered in pulsating form, at twice the line frequency. At lower secondary voltages, the storage capacitors necessary to bridge the energy delivery pulses quickly become impractically large when a low output ripple voltage is required.
Thus what is needed is a ripple reduction method and apparatus that can substantially reduce the energy stored in the ripple filter, thus achieving an appreciable size and cost reduction. Preferably, the ripple reduction method and apparatus will be applicable to a single conversion topology to further minimize size and cost.